Erstellt am 22. Juni 2026
DFT Engineer (M, F, D)
Apple
München, Bavaria 80331, Germany
Vollzeit
Reference: 30693314
Imagine what you could do here. At Apple, new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, inquisitive people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it. Join us to help deliver the next phenomenal Apple product. Do you enjoy working on challenges that no one has solved yet? As a member of our multifaceted group, you will get the outstanding and rewarding opportunity to craft upcoming products that will delight and inspire millions of Apple's customers every single day. Are you ready to join a team redefining hardware technology? We are searching for a passionate engineer to join our exciting team of problem solvers. Join us!
As a DFT engineer, you will lead the complete DFT solution for a chip project, with responsibilities spanning all aspects of semiconductor development.
B.Sc./M.Sc./PhD in Electrical Engineering, Computer Science, or a related field.\nSolid knowledge of industry-standard DFT practices, including ATPG, JTAG, MBIST, and the trade-offs between test quality and test time.\nProficient in Verilog and/or VHDL, with hands-on experience using simulators and waveform debugging tools.\nExperience developing DFT specifications and driving DFT architecture and methods for designs.\nProven understanding of design verification (DV) methodologies for validating DFT implementation in simulation pre-silicon.\nProficient in a scripting language such as Python, TCL, or Perl, including familiarity or proficiency in leveraging generative AI tools to accelerate scripting and engineering workflows.\nAbility to fluently speak and write in English, including expressing complex technical concepts clearly.
Experience developing DFT specifications and driving DFT architecture and methods for designs\nProven Understanding of design verification (DV) methodologies for validating DFT implementation in simulation pre-silicon\nExperience debugging compressed ATPG patterns, MBIST, and JTAG/1500 related issues.\nExperience with STA constraints development and analysis for DFT modes, as well as SDF simulations.\nAbility to conduct experiments during silicon debug, gathering and analyzing data, and using scripting to support efficient handling of ATE data.\nExcellent problem-solving and communication skills.\nExperience in large SoC design or verification.
As a DFT engineer, you will lead the complete DFT solution for a chip project, with responsibilities spanning all aspects of semiconductor development.
B.Sc./M.Sc./PhD in Electrical Engineering, Computer Science, or a related field.\nSolid knowledge of industry-standard DFT practices, including ATPG, JTAG, MBIST, and the trade-offs between test quality and test time.\nProficient in Verilog and/or VHDL, with hands-on experience using simulators and waveform debugging tools.\nExperience developing DFT specifications and driving DFT architecture and methods for designs.\nProven understanding of design verification (DV) methodologies for validating DFT implementation in simulation pre-silicon.\nProficient in a scripting language such as Python, TCL, or Perl, including familiarity or proficiency in leveraging generative AI tools to accelerate scripting and engineering workflows.\nAbility to fluently speak and write in English, including expressing complex technical concepts clearly.
Experience developing DFT specifications and driving DFT architecture and methods for designs\nProven Understanding of design verification (DV) methodologies for validating DFT implementation in simulation pre-silicon\nExperience debugging compressed ATPG patterns, MBIST, and JTAG/1500 related issues.\nExperience with STA constraints development and analysis for DFT modes, as well as SDF simulations.\nAbility to conduct experiments during silicon debug, gathering and analyzing data, and using scripting to support efficient handling of ATE data.\nExcellent problem-solving and communication skills.\nExperience in large SoC design or verification.
