Erstellt am 22. Juni 2026
Experienced AMS Digital Design Engineer (m/f/d)
Apple
München, Bavaria 80331, Germany
Vollzeit
Reference: 2092994160
At Apple, we work every single day to craft products that enrich people's lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for a forward-thinking and unusually creative RTL Design Engineer. As a part of our multifaceted group, you will have the rare and great opportunity to craft upcoming products that will delight and encourage millions of Apple's customers every single day. \\n\\nYou will join the AMS (Analog Mixed Signal) Design Team. We provide outstanding PHY designs for high-performance, low power applications. As a logic design engineer, you will be involved in all phases of the design, from concept study, architecture definition, design and verification, to silicon bring-up and characterization in our Munich team.
- Work with systems team to understand the top level requirements of the digital functions and develop detailed specifications \n- Implement the function using Verilog RTL according to specification\n- Partition the function between HW and FW for most efficient implementation \n- Develop RTL and FW to implement the function \n- Perform unit level testing on the RTL function \n\nOther responsibilities could include: \n- RTL synthesis \n- Equivalence checking Static Timing Analysis \n- Develop FW to support DV and ATE environments \n- Support the DV team by writing self-checking tests as required
Experience in digital design including RTL design experience\nKnowledge of best practices with respect to implementation of digital logic\nBasic understanding of analog and full custom circuit design\nUnderstanding of digital design flow including RTL simulation, logic synthesis, timing constraints, timing closure, STA, back annotation of parasitics, gate level simulation, equivalence checking\nBasic understanding of Design Verification (DV) and the ability to write self-checking test suites\nAbility to analyze a design and partition between HW implementation and SW control\nUnderstanding of ASIC test methodology such as scan insertion, memory BIST and test pattern generation\nProficiency in English language is required
Bachelor's degree or Master's degree or PhD in Electrical/Computer Engineering or proven industrial experience/degree equivalent\nAbility to write assembly level code and higher level code\nExperience in hands-on lab evaluation\nTeam player with excellent written and verbal communication skills who has the desire to seek diverse challenges with international teams\nAbility to work well with international teams, take ownership and motivate self and others\nApple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.
- Work with systems team to understand the top level requirements of the digital functions and develop detailed specifications \n- Implement the function using Verilog RTL according to specification\n- Partition the function between HW and FW for most efficient implementation \n- Develop RTL and FW to implement the function \n- Perform unit level testing on the RTL function \n\nOther responsibilities could include: \n- RTL synthesis \n- Equivalence checking Static Timing Analysis \n- Develop FW to support DV and ATE environments \n- Support the DV team by writing self-checking tests as required
Experience in digital design including RTL design experience\nKnowledge of best practices with respect to implementation of digital logic\nBasic understanding of analog and full custom circuit design\nUnderstanding of digital design flow including RTL simulation, logic synthesis, timing constraints, timing closure, STA, back annotation of parasitics, gate level simulation, equivalence checking\nBasic understanding of Design Verification (DV) and the ability to write self-checking test suites\nAbility to analyze a design and partition between HW implementation and SW control\nUnderstanding of ASIC test methodology such as scan insertion, memory BIST and test pattern generation\nProficiency in English language is required
Bachelor's degree or Master's degree or PhD in Electrical/Computer Engineering or proven industrial experience/degree equivalent\nAbility to write assembly level code and higher level code\nExperience in hands-on lab evaluation\nTeam player with excellent written and verbal communication skills who has the desire to seek diverse challenges with international teams\nAbility to work well with international teams, take ownership and motivate self and others\nApple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.
